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1. Field of the Invention
This invention relates generally to protocols for multiprocessor computer systems and processes therein, and has particular applicability to the Intel processors. The protocol may be used in a multiprocessor configuration with only and may be applicable to multiprocessor configurations with only non-Intel type processors as well processors or in a computer system having more than one type of processor, including non-Intel processors. (A computer system is to be thought of as any system for processing data having a single xe2x80x9cmainxe2x80x9d memory, at least one instruction processor (a xe2x80x9cHostxe2x80x9d processor although in preferred configurations, a Host itself will be comprised of more than one processor) and at least one input/output (I/O) device associated therewith and controlled thereby. The invention relates to multiple processor computer systems and communications between a Host processor and a management processor that is available for managing operations of the multiprocessor computer system.)
2. Background Information
To provide flexibility in operations of multiprocessor systems using Intel processors has proven to be a challenge due to the inherent design attributes of such processors, as well as the design attributes of the operating systems which run with them. To do it in a way which allows for heterogeneity of processors and operating systems in a single computer system is even more difficult.
Described herein is a system having a protocol for communication by all the xe2x80x9chostxe2x80x9d processors on a computer system with a management system processor. In the preferred form, Intel brand processors or ones which follow their specifications, are used for all host processors and for the management processor(s) in the computer system. The management system processor coordinates the activities of all the host processors, accommodating the host processors"" needs for system resources as communicated to the management processor.
It is important to keep in mind various valuable attributes of multiprocessor systems that allow for such a form of management system to allocate the system resources dynamically. Specifically, the protocol used should allow a management system to monitor the host system(s) and perform valuable functions to make the overall system run efficiently. Some of the functions should include partitioning into multiple partitions (each partition having an instantiation of an operating system), controlling the execution of the host operating system (start, stop, boot, etc.) and viewing the status of hardware units in the system. Ultimately, the management system should have control over the host(s).
The protocol should also be flexible, providing new messages and formats without changing the protocol itself. Also, from the Host system""s perspective, the management system should look like any other I/O device to allow the management system to be connected to the host systems through any I/O port, giving substantial flexibility in how the whole system can be managed and from where. Also, it would be advantageous to be able to direct host systems as well as the management system to buffer areas in memory where substantial chunks of information can be passed.
In U.S. patent application Ser. No. 09/120,797, now abandoned entitled: COMPUTER SYSTEM AND METHOD FOR OPERATING MULTIPLE OPERATING SYSTEMS IN DIFFERENT PARTITIONS OF THE COMPUTER SYSTEM AND FOR ALLOWING THE DIFFERENT PARTITIONS TO COMMUNICATE WITH ONE ANOTHER THROUGH SHARED MEMORY, (incorporated herein in its entirety by this reference thereto) for example, it is taught how a computing system can be constructed so that a problem can be shared between partitions, leading to increases in throughput. In this cited document a number of other systems which can be employed in multiprocessor environments are mentioned in the background section. All such systems can be enhanced and take advantage of having a unique management node which can organize the manner in which the processors in a multiprocessor computer system employ the resources of the system. (Providing a redundant management node is not an unreasonable enhancement.) The management node can cooperatively reconfigure the resources of the computer system to allow for removal of parts of the system and their replacement without ever stopping the overall computer system functioning. Thus, in highly interactive transaction processing systems, for just one example, the transactions can continue to execute while segments of the computer system are removed from the system and replaced for upgrade or repair, even including sections of the main memory. Information from banks of sensors can continue to be processed while a processor or group of processors is swapped out, for another example. I/O subsystems can be brought down or added without stopping the entire system for the change, for a third example.
In U.S. patent application Ser. No. 09/362,388 now U.S. Pat. No. 6,687,818 entitled: METHOD AND APPARATUS FOR INITIATING EXECUTION OF AN APPLICATION PROCESSOR IN A CLUSTERED MULTIPROCESSOR SYSTEM, also incorporated herein by this reference in its entirety, a boot process for multiprocessor systems is described that uses some of the protocol which will be described in detail herein.
The relative ubiquity of Intel microprocessor architectures, from the so called x86 to the IA32 and IA64 and the concomitant ubiquity of Microsoft NT-type operating systems makes it important to be able to employ Intel""s design in such multiprocessor systems. Enhancing commercial compatibility in a multiprocessor environment with what most of the world uses in its computing environments becomes achievable through the use of an Intel Host Protocol. With a properly configured BIOS, one can use the inventively designed protocol communications to direct the activities of such processors to memory locations that assign specific resources to each such processor. However, the difficulties are multiplied by the fact that all memory locations in a multiprocessor computer system that employs a single memory unit (or single memory unit group for the main memory function for all the processors) must be assigned to each Intel processor so that the individual memory map of the Intel processor (or whichever other processor type might employ this inventive protocol) operates effectively in such a system.
When in operation in a multiprocessor system, these processors, are called xe2x80x9chostxe2x80x9d processors since they provide the processing hardware services to the applications and operating system software for their partition of the computer system.